Texas Instruments TM4C1294NCPDT User Manual

Register 132: Synchronous Serial Interface Deep-Sleep Mode Clock Gating
Control (DCGCSSI), offset 0x81C
The DCGCSSI register provides software the capability to enable and disable the SSI modules in
deep-sleep mode. When enabled, a module is provided a clock. When disabled, the clock is disabled
to save power.
Important: This register should be used to control the clocking for the SSI modules.
Synchronous Serial Interface Deep-Sleep Mode Clock Gating Control (DCGCSSI)
Base 0x400F.E000
Offset 0x81C
Type RW, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
D0D1D2D3reserved
RWRWRWRWROROROROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved31:4
SSI Module 3 Deep-Sleep Mode Clock Gating Control
DescriptionValue
SSI module 3 is disabled in deep-sleep mode.0
Enable and provide a clock to SSI module 3 in deep-sleep mode.1
0RWD33
SSI Module 2 Deep-Sleep Mode Clock Gating Control
DescriptionValue
SSI module 2 is disabled in deep-sleep mode.0
Enable and provide a clock to SSI module 2 in deep-sleep mode.1
0RWD22
SSI Module 1 Deep-Sleep Mode Clock Gating Control
DescriptionValue
SSI module 1 is disabled in deep-sleep mode.0
Enable and provide a clock to SSI module 1 in deep-sleep mode.1
0RWD11
SSI Module 0 Deep-Sleep Mode Clock Gating Control
DescriptionValue
SSI module 0 is disabled in deep-sleep mode.0
Enable and provide a clock to SSI module 0 in deep-sleep mode.1
0RWD00
June 18, 2014438
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System Control

Texas Instruments TM4C1294NCPDT Specifications

General

Brand	Texas Instruments
Model	TM4C1294NCPDT
Category	Microcontrollers
Language	English