6 Processor Support and Exception Module
This module is an AHB peripheral that handles system-level Cortex-M4 FPU exceptions. For functions
with registers mapped into this aperture, if the function is not available on a device, then all writes
to the associated registers are ignored and reads return zeros.
6.1 Functional Description
The System Exception module provides control and status of the system-level interrupts. All the
interrupt events are ORed together before being sent to the interrupt controller, so the System
Exception module can only generate a single interrupt request to the controller at any given time.
Software can service multiple interrupt events in a single interrupt service routine by reading the
System Exception Masked Interrupt Status (SYSEXCMIS) register. The interrupt events that can
trigger a controller-level interrupt are defined in the System Exception Interrupt Mask (SYSEXCIM)
register by setting the corresponding interrupt mask bits. If interrupts are not used, the raw interrupt
status is always visible via the System Exception Raw Interrupt Status (SYSEXCRIS) register.
Interrupts are always cleared (for both the SYSEXCMIS and SYSEXCRIS registers) by writing a 1
to the corresponding bit in the System Exception Interrupt Clear (SYSEXCIC) register.
6.2 Register Map
Table 6-1 on page 523 lists the System Exception module registers. The offset listed is a hexadecimal
increment to the register's address, relative to the System Exception base address of 0x400F.9000.
Note: Spaces in the System Exception register space that are not used are reserved for future or
internal use. Software should not modify any reserved memory address.
Table 6-1. System Exception Register Map
See
page
DescriptionResetTypeNameOffset
524System Exception Raw Interrupt Status0x0000.0000ROSYSEXCRIS0x000
526System Exception Interrupt Mask0x0000.0000RWSYSEXCIM0x004
528System Exception Masked Interrupt Status0x0000.0000ROSYSEXCMIS0x008
530System Exception Interrupt Clear0x0000.0000W1CSYSEXCIC0x00C
6.3 Register Descriptions
All addresses given are relative to the System Exception base address of 0x400F.9000.
523June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller
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