■ Hardware Calendar Function
– Year, Month, Day, Day of Week, Hours, Minutes, Seconds
– Four-year leap compensation
– 24-hour or AM/PM configuration
■ Two mechanisms for power control
– System power control using discrete external regulator
– On-chip power control using internal switches under register control
■ V
DD
supplies power when valid, even if V
BAT
> V
DD
■ Dedicated pin for waking using an external signal
■ Capability to configure external reset (RST) pin and/or up to four GPIO port pins as wake source,
with programmable wake level
■ Tamper Functionality
– Support for four tamper inputs
– Configurable level, weak pull-up, and glitch filter
– Configurable tamper event response
– Logging of up to four tamper events
– Optional BBRAM erase on tamper detection
– Tamper wake from hibernate capability
– Hibernation clock input failure detect with a switch to the internal oscillator on detection
■ RTC operational and hibernation memory valid as long as V
DD
or V
BAT
is valid
■ Low-battery detection, signaling, and interrupt generation, with optional wake on low battery
■ GPIO pin state can be retained during hibernation
■ Clock source from an internal low frequency oscillator (HIB LFIOSC) or a 32.768-kHz external
crystal or oscillator
■ Sixteen 32-bit words of battery-backed memory to save state during hibernation
■ Programmable interrupts for:
– RTC match
– External wake
– Low battery
June 18, 201472
Texas Instruments-Production Data
Architectural Overview
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