– Hibernation clock input failure detect with a switch to the internal oscillator on detection
■ RTC operational and hibernation memory valid as long as V
DD
or V
BAT
is valid
■ Low-battery detection, signaling, and interrupt generation, with optional wake on low battery
■ GPIO pin state can be retained during hibernation
■ Clock source from an internal low frequency oscillator (HIB LFIOSC) or a 32.768-kHz external
crystal or oscillator
■ Sixteen 32-bit words of battery-backed memory to save state during hibernation
■ Programmable interrupts for:
– RTC match
– External wake
– Low battery
June 18, 2014532
Texas Instruments-Production Data
Hibernation Module
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