Register 2: PWM Time Base Sync (PWMSYNC), offset 0x004
This register provides a method to perform synchronization of the counters in the PWM generation
blocks. Setting a bit in this register causes the specified counter to reset back to 0; setting multiple
bits resets multiple counters simultaneously. The bits auto-clear after the reset has occurred; reading
them back as zero indicates that the synchronization has completed.
PWM Time Base Sync (PWMSYNC)
PWM0 base: 0x4002.8000
Offset 0x004
Type RW, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
SYNC0SYNC1SYNC2SYNC3reserved
RWRWRWRWROROROROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0000.000ROreserved31:4
Reset Generator 3 Counter
DescriptionValue
No effect.0
Resets the PWM generator 3 counter.1
0RWSYNC33
Reset Generator 2 Counter
DescriptionValue
No effect.0
Resets the PWM generator 2 counter.1
0RWSYNC22
Reset Generator 1 Counter
DescriptionValue
No effect.0
Resets the PWM generator 1 counter.1
0RWSYNC11
Reset Generator 0 Counter
DescriptionValue
No effect.0
Resets the PWM generator 0 counter.1
0RWSYNC00
1685June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller
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