Register 29: GPIO Wake Status (GPIOWAKESTAT), offset 0x548
This register indicates the GPIO wake event status. If a register bit has been set for K[7:4] , a wake
event signal has been sent to the Hibernate module.
Note: This register is only available on Port K.
GPIO Wake Status (GPIOWAKESTAT)
GPIO Port A (AHB) base: 0x4005.8000
GPIO Port B (AHB) base: 0x4005.9000
GPIO Port C (AHB) base: 0x4005.A000
GPIO Port D (AHB) base: 0x4005.B000
GPIO Port E (AHB) base: 0x4005.C000
GPIO Port F (AHB) base: 0x4005.D000
GPIO Port G (AHB) base: 0x4005.E000
GPIO Port H (AHB) base: 0x4005.F000
GPIO Port J (AHB) base: 0x4006.0000
GPIO Port K (AHB) base: 0x4006.1000
GPIO Port L (AHB) base: 0x4006.2000
GPIO Port M (AHB) base: 0x4006.3000
GPIO Port N (AHB) base: 0x4006.4000
GPIO Port P (AHB) base: 0x4006.5000
GPIO Port Q (AHB) base: 0x4006.6000
Offset 0x548
Type RO, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
reservedSTAT4STAT5STAT6STAT7reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0000.000ROreserved31:8
K[7] Wake Status
This is for future use.
DescriptionValue
Pin is not wake up source0
Pin wake event asserted to hibernate module1
0ROSTAT77
K[6] Wake Status
This is for future use.
DescriptionValue
Pin is not wake up source0
Pin wake event asserted to hibernate module1
0ROSTAT66
797June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller