Register 21: ADC Sample Sequence FIFO 0 Status (ADCSSFSTAT0), offset
0x04C
Register 22: ADC Sample Sequence FIFO 1 Status (ADCSSFSTAT1), offset
0x06C
Register 23: ADC Sample Sequence FIFO 2 Status (ADCSSFSTAT2), offset
0x08C
Register 24: ADC Sample Sequence FIFO 3 Status (ADCSSFSTAT3), offset
0x0AC
This register provides a window into the sample sequencer, providing full/empty status information
as well as the positions of the head and tail pointers. The reset value of 0x100 indicates an empty
FIFO with the head and tail pointers both pointing to index 0. The ADCSSFSTAT0 register provides
status on FIFO0, which has 8 entries; ADCSSFSTAT1 on FIFO1, which has 4 entries;
ADCSSFSTAT2 on FIFO2, which has 4 entries; and ADCSSFSTAT3 on FIFO3 which has a single
entry.
ADC Sample Sequence FIFO n Status (ADCSSFSTATn)
ADC0 base: 0x4003.8000
ADC1 base: 0x4003.9000
Offset 0x04C
Type RO, reset 0x0000.0100
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
TPTRHPTREMPTYreservedFULLreserved
ROROROROROROROROROROROROROROROROType
0000000010000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0000.0ROreserved31:13
FIFO Full
DescriptionValue
The FIFO is not currently full.0
The FIFO is currently full.1
0ROFULL12
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0ROreserved11:9
FIFO Empty
DescriptionValue
The FIFO is not currently empty.0
The FIFO is currently empty.1
1ROEMPTY8
1119June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller
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