Register 24: Interrupt 0-3 Priority (PRI0), offset 0x400
Register 25: Interrupt 4-7 Priority (PRI1), offset 0x404
Register 26: Interrupt 8-11 Priority (PRI2), offset 0x408
Register 27: Interrupt 12-15 Priority (PRI3), offset 0x40C
Register 28: Interrupt 16-19 Priority (PRI4), offset 0x410
Register 29: Interrupt 20-23 Priority (PRI5), offset 0x414
Register 30: Interrupt 24-27 Priority (PRI6), offset 0x418
Register 31: Interrupt 28-31 Priority (PRI7), offset 0x41C
Register 32: Interrupt 32-35 Priority (PRI8), offset 0x420
Register 33: Interrupt 36-39 Priority (PRI9), offset 0x424
Register 34: Interrupt 40-43 Priority (PRI10), offset 0x428
Register 35: Interrupt 44-47 Priority (PRI11), offset 0x42C
Register 36: Interrupt 48-51 Priority (PRI12), offset 0x430
Register 37: Interrupt 52-55 Priority (PRI13), offset 0x434
Register 38: Interrupt 56-59 Priority (PRI14), offset 0x438
Register 39: Interrupt 60-63 Priority (PRI15), offset 0x43C
Note: This register can only be accessed from privileged mode.
The PRIn registers (see also page 161) provide 3-bit priority fields for each interrupt. These registers
are byte accessible. Each register holds four priority fields that are assigned to interrupts as follows:
InterruptPRIn Register Bit Field
Interrupt [4n+3]Bits 31:29
Interrupt [4n+2]Bits 23:21
Interrupt [4n+1]Bits 15:13
Interrupt [4n]Bits 7:5
See Table 2-9 on page 116 for interrupt assignments.
Each priority level can be split into separate group priority and subpriority fields. The PRIGROUP
field in the Application Interrupt and Reset Control (APINT) register (see page 171) indicates the
position of the binary point that splits the priority and subpriority fields.
These registers can only be accessed from privileged mode.
159June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller
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