12 Cyclical Redundancy Check (CRC)
The Cyclical Redundancy Check (CRC) computation module can be used for message transfer and
safety system checks The following features are supported:
■ Support four major CRC forms:
– CRC16-CCITT as used by CCITT/ITU X.25
– CRC16-IBM as used by USB and ANSI
– CRC32-IEEE as used by IEEE802.3 and MPEG2
– CRC32C as used by G.Hn
■ Allows word and byte feed
■ Supports auto-initialization and manual initialization
■ Supports MSb and LSb
■ Supports CCITT post-processing
■ Can be fed by µDMA, Flash memory and code
12.1 Functional Description
The following sections describe the features of CRC.
12.1.1 CRC Support
The purpose of the CRC engine is to accelerate CRC and TCP checksum operation. The result of
the CRC operation is a 32- and 16-bit signature which can be used to check the sanity of data. The
required mode of operation is selected through the TYPE bit in the CRC Control (CRCCTRL) register,
offset 0x400. A µDMA software channel can be used to burst data into the CRC module. CRCs are
computed combinatorially in one clock.
The CRC module contains all of the control registers to which the input context interfaces. Because
CRC calculations are a single cycle, as soon as data is written to CRC Data Input (CRCDIN) register,
the result of CRC/CSUM is updated in the CRC SEED/Context (CRCSEED) register, offset 0x410.
The input data is computed by the selected CRC polynomial or CSUM.
12.1.1.1 CRC Checksum engine
Software can offload the CRC and checksum task to the CRC checksum engine accelerator. The
accelerator has registers that need to be programmed to initiate processing. These registers should
be fed with data in order to calculate CRC/CSUM. Software should configure the µDMA channel
for data movement through the DMA Channel Map Select n (DMACHMAPn) register in the μDMA
module. Further µDMA configuration guidelines are available in the “Micro Direct Memory Access
(μDMA)” on page 678.
The starting seed for the CRC and checksum operation is programmed in the CRC SEED/Context
(CRCSEED) register at offset 0x410. Depending on the encoding of the INIT field in the CRCCTRL
register, the value of the SEED field can initialized to any one of the following:
■ A unique context value written to the CRCSEED register (INIT=0x0)
June 18, 2014946
Texas Instruments-Production Data
Cyclical Redundancy Check (CRC)
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