Texas Instruments TM4C1294NCPDT User Manual

Register 113: Synchronous Serial Interface Sleep Mode Clock Gating Control
(SCGCSSI), offset 0x71C
The SCGCSSI register provides software the capability to enable and disable the SSI modules in
sleep mode. When enabled, a module is provided a clock. When disabled, the clock is disabled to
save power.
Important: This register should be used to control the clocking for the SSI modules.
Synchronous Serial Interface Sleep Mode Clock Gating Control (SCGCSSI)
Base 0x400F.E000
Offset 0x71C
Type RW, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
S0S1S2S3reserved
RWRWRWRWROROROROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved31:4
SSI Module 3 Sleep Mode Clock Gating Control
DescriptionValue
SSI module 3 is disabled in sleep mode.0
Enable and provide a clock to SSI module 3 in sleep mode.1
0RWS33
SSI Module 2 Sleep Mode Clock Gating Control
DescriptionValue
SSI module 2 is disabled in sleep mode.0
Enable and provide a clock to SSI module 2 in sleep mode.1
0RWS22
SSI Module 1 Sleep Mode Clock Gating Control
DescriptionValue
SSI module 1 is disabled in sleep mode.0
Enable and provide a clock to SSI module 1 in sleep mode.1
0RWS11
SSI Module 0 Sleep Mode Clock Gating Control
DescriptionValue
SSI module 0 is disabled in sleep mode.0
Enable and provide a clock to SSI module 0 in sleep mode.1
0RWS00
June 18, 2014414
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Texas Instruments TM4C1294NCPDT Specifications

General

Brand	Texas Instruments
Model	TM4C1294NCPDT
Category	Microcontrollers
Language	English