Texas Instruments TM4C1294NCPDT - Register 11: DMA Channel Useburst Clear (DMAUSEBURSTCLR), Offset 0 X01 C

Register 11: DMA Channel Useburst Clear (DMAUSEBURSTCLR), offset 0x01C
Each bit of the DMAUSEBURSTCLR register represents the corresponding μDMA channel. Setting
a bit clears the corresponding SET[n] bit in the DMAUSEBURSTSET register.
DMA Channel Useburst Clear (DMAUSEBURSTCLR)
Base 0x400F.F000
Offset 0x01C
Type WO, reset -
16171819202122232425262728293031
CLR[n]
WOWOWOWOWOWOWOWOWOWOWOWOWOWOWOWOType
----------------Reset
0123456789101112131415
CLR[n]
WOWOWOWOWOWOWOWOWOWOWOWOWOWOWOWOType
----------------Reset
DescriptionResetTypeNameBit/Field
Channel [n] Useburst Clear
DescriptionValue
No effect.0
Setting a bit clears the corresponding SET[n] bit in the
DMAUSEBURSTSET register meaning that µDMA channel [n]
responds to single and burst requests.
1
-WOCLR[n]31:0
June 18, 2014718
Texas Instruments-Production Data
Micro Direct Memory Access (μDMA)