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Texas Instruments TM4C1294NCPDT User Manual

Texas Instruments TM4C1294NCPDT
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Register 61: System Handler Priority 1 (SYSPRI1), offset 0xD18
Note: This register can only be accessed from privileged mode.
The SYSPRI1 register configures the priority level, 0 to 7 of the usage fault, bus fault, and memory
management fault exception handlers. This register is byte-accessible.
System Handler Priority 1 (SYSPRI1)
Base 0xE000.E000
Offset 0xD18
Type RW, reset 0x0000.0000
16171819202122232425262728293031
reservedUSAGEreserved
RORORORORORWRWRWROROROROROROROROType
0000000000000000Reset
0123456789101112131415
reservedMEMreservedBUS
RORORORORORWRWRWRORORORORORWRWRWType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x00ROreserved31:24
Usage Fault Priority
This field configures the priority level of the usage fault. Configurable
priority values are in the range 0-7, with lower values having higher
priority.
0x0RWUSAGE23:21
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0ROreserved20:16
Bus Fault Priority
This field configures the priority level of the bus fault. Configurable priority
values are in the range 0-7, with lower values having higher priority.
0x0RWBUS15:13
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0ROreserved12:8
Memory Management Fault Priority
This field configures the priority level of the memory management fault.
Configurable priority values are in the range 0-7, with lower values
having higher priority.
0x0RWMEM7:5
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0ROreserved4:0
177June 18, 2014
Texas Instruments-Production Data
Tiva
TM4C1294NCPDT Microcontroller

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Texas Instruments TM4C1294NCPDT Specifications

General IconGeneral
BrandTexas Instruments
ModelTM4C1294NCPDT
CategoryMicrocontrollers
LanguageEnglish

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