Table 10-3. GPIO Drive Strength Options
Drive (mA)GPIODR2R (2mA)GPIODR4R
(+2mA)
GPIODR8R
(+4mA)
GPIODR12R
(+4mA)
EDMn
(GPIOPC)
EDE
(GPIOPP)
2100
N/A0x0X 4010
8001
2N/A00
N/A0x11
4N/A10
6N/A01
8N/A11
2N/A000
0x31
4N/A100
6N/A010
8N/A110
10N/A011
12N/A111
N/AN/AN/A01
N/AN/AN/AN/AN/A0x21
10.3.6 Identification
The identification registers configured at reset allow software to detect and identify the module as
a GPIO block. The identification registers include the GPIOPeriphID0-GPIOPeriphID7 registers as
well as the GPIOPCellID0-GPIOPCellID3 registers.
10.4 Initialization and Configuration
To configure the GPIO pins of a particular port, follow these steps:
1. Enable the clock to the port by setting the appropriate bits in the RCGCGPIO register (see
page 382). In addition, the SCGCGPIO and DCGCGPIO registers can be programmed in the
same manner to enable clocking in Sleep and Deep-Sleep modes.
2. Set the direction of the GPIO port pins by programming the GPIODIR register. A write of a 1
indicates output and a write of a 0 indicates input.
3. Configure the GPIOAFSEL register to program each bit as a GPIO or alternate pin. If an alternate
pin is chosen for a bit, then the PMCx field must be programmed in the GPIOPCTL register for
the specific peripheral required. There are also two registers, GPIOADCCTL and GPIODMACTL,
which can be used to program a GPIO pin as a ADC or μDMA trigger, respectively.
4. Set the EDMn field in the GPIOPC register as shown in Table 10-3 on page 753.
5. Set or clear the GPIODR4R register bits as shown in Table 10-3 on page 753.
6. Set or clear the GPIODR8R register bits as shown in Table 10-3 on page 753.
7. Set or clear the GPIODR12R register bits as shown in Table 10-3 on page 753.
753June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller
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