Register 1: ADC Active Sample Sequencer (ADCACTSS), offset 0x000
This register controls the activation of the sample sequencers. Each sample sequencer can be
enabled or disabled independently.
ADC Active Sample Sequencer (ADCACTSS)
ADC0 base: 0x4003.8000
ADC1 base: 0x4003.9000
Offset 0x000
Type RW, reset 0x0000.0000
16171819202122232425262728293031
BUSYreserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
ASEN0ASEN1ASEN2ASEN3reservedADEN0ADEN1ADEN2ADEN3reserved
RWRWRWRWRORORORORWRWRWRWROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved31:17
ADC Busy
DescriptionValue
ADC is idle0
ADC is busy1
Note: In order to use the BUSY bit, the ADC Event Multiplexer
Select (ADCEMUX) register must be programmed such that
no trigger is selected (bit field encoding is 0xE). The NEVER
encoding in the ADCEMUX register allows the ADC to safely
be put in Deep-Sleep mode.
0ROBUSY16
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved15:12
ADC SS3 DMA Enable
DescriptionValue
DMA for Sample Sequencer 3 is disabled.0
DMA for Sample Sequencer 3 is enabled.1
0RWADEN311
ADC SS2 DMA Enable
DescriptionValue
DMA for Sample Sequencer 2 is disabled.0
DMA for Sample Sequencer 2 is enabled.1
0RWADEN210
1077June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller
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