Register 41: EPI Host-Bus 16 Timing Extension (EPIHB16TIME2), offset 0x314
Important: The MODE field in the EPICFG register determines which configuration is enabled.
For EPIHB16TIME2 to be valid, the MODE field must be 0x3.
EPI Host-Bus 16 Timing Extension (EPIHB16TIME2)
Base 0x400D.0000
Offset 0x314
Type RW, reset 0x0002.2000
16171819202122232425262728293031
PSRAMSZreservedIRDYDLYreserved
RWRWRWRORORORORORWRWROROROROROROType
0100000000000000Reset
0123456789101112131415
RDWSMreservedWRWSMreservedCAPWIDTHreserved
RWRORORORWRORORORORORORORWRWROROType
0000000000000100Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x00ROreserved31:26
CS1n Input Ready Delay
DescriptionValue
reserved0
Stall begins one EPI clocks past iRDY low being sampled on
the rising edge of EPIO clock.
1
Stall begins two EPI clocks past iRDY low being sampled on
the rising edge of EPIO clock.
2
Stall begins three EPI clocks past iRDY low being sampled on
the rising edge of EPIO clock.
3
0x0RWIRDYDLY25:24
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x000ROreserved23:19
PSRAM Row Size
Defines the row size for the PSRAM controlled by CS1n
DescriptionValue
No row size limitation0x0
128 B0x1
256 B0x2
512 B0x3
1024 B0x4
2048 B0x5
4096 B0x6
8192 B0x7
0x2RWPSRAMSZ18:16
935June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller
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