Register 9: NMI Cause Register (NMIC), offset 0x064
This register provides the detailed information on the cause of an NMI interrupt. These bits are set
via hardware when the event occurs AND the higher level control indicates that it should be NMI
event.
Note: The NMIC register has to be cleared by the following sequence:
1. Read the NMIC register to identify the source of the NMI.
2. Clear the source of the NMI.
3. Read the NMIC register again to check the status.
4. Write a 0 into the NMIC register bit that corresponds with the NMI source.
5. Read the NMIC to check whether it is cleared. If not, repeat 3 on page 271 and
4 on page 271 again.
NMI Cause Register (NMIC)
Base 0x400F.E000
Offset 0x064
Type RW, reset 0x0000.0000
16171819202122232425262728293031
MOSCFAIL
reserved
RWROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
EXTERNAL
reservedPOWERWDT0reservedWDT1reservedTAMPERreserved
RWRORWRWRORWRORORORWROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved31:17
MOSC Failure NMI
DescriptionValue
No MOSC failure has occurred.0
An NMI has occurred due to a MOSC failure.1
0RWMOSCFAIL16
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved15:10
271June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller
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