Register 1: Ethernet MAC Configuration (EMACCFG), offset 0x000
The EMACCFG register establishes receive and transmit operating modes. Note that the TWOKPEN
bit is only applicable when the JFEN bit is 0.
Ethernet MAC Configuration (EMACCFG)
Base 0x400E.C000
Offset 0x000
Type RW, reset 0x0000.8000
16171819202122232425262728293031
DISCRSIFGJFENreservedJDWDDISreservedCSTreservedTWOKPENSADDRreserved
RWRWRWRWRWRORWRWRORWRORWRWRWRWROType
0000000000000000Reset
0123456789101112131415
PRELENRETEDCBLACSreservedDRIPCDUPMLOOPBMDROFESPS
RWRWRWRWRWRWRWRWRORWRWRWRWRWRWROType
0000000000000001Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0ROreserved31
Source Address Insertion or Replacement Control
Bit 30 specifies whether MAC address 0 or 1 registers are used during
insertion or replacement for all transmitted frames. Thus for encodings
0x2-0x3, where the most significant bit is 0, the Ethernet MAC Address
0 registers are used.
For encodings 0x6-0x7, the Ethernet MAC Address 1 registers are
used.
Bits [29:28] indicate insertion or replacement. If the value is 0x2 insertion
is indicated and if the value is 0x3 replacement is indicated.
DescriptionValue
reserved0x0-0x1
The Ethernet MAC inserts the content of the Ethernet MAC
Address 0 (EMACADDR0x) registers in the SA field of all
transmitted frames.
0x2
The Ethernet MAC replaces the content of the Ethernet MAC
Address 0 (EMACADDR0x) registers in the SA field of all
transmitted frames.
0x3
reserved0x4-0x5
The MAC inserts the content of the Ethernet MAC Address
1 (EMACADDR1x) registers in the source address (SA) field
for all transmitted frames.
0x6
The MAC replaces the content of the Ethernet MAC Address
1(EMACADDR1x) registers in the source address (SA) field
for all transmitted frames.
0x7
Note: Changes in this field take effect only on the start of a frame.
If a write of this field occurs while a frame is being transmitted,
only the subsequent frame can use the updated value, and
the current frame does not.
0x0RWSADDR30:28
1471June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller
To Next Page
Loading...
Need help?
General
