Texas Instruments TM4C1294NCPDT - Figure 18-9. Master Single RECEIVE

Figure 18-9. Master Single RECEIVE
Idle
Write Slave
Address to
I2CMSA
Read I2CMCS
Sequence may be
omitted in a Single
Master system
BUSBSY bit=0?
NO
Write ---00111
to I2CMCS
YES
Read I2CMCS
BUSY bit=0?
ERROR bit=0?
YES
Error Service
Idle
NO
NO
Read data from
I2CMDR
YES
1291June 18, 2014
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TM4C1294NCPDT Microcontroller