Register 8: EPI Host-Bus 8 Configuration 2 (EPIHB8CFG2), offset 0x014
Important: The MODE field in the EPICFG register determines which configuration register is
accessed for offsets 0x010 and 0x014.
To access EPIHB8CFG2, the MODE field of the EPICFG register must be 0x2.
This register is used to configure operation while in Host-Bus 8 mode. Note that this register is reset
when the MODE field in the EPICFG register is changed. If another mode is selected and the Host-Bus
8 mode is selected again, the values must be reinitialized.
EPI Host-Bus 8 Configuration 2 (EPIHB8CFG2)
Base 0x400D.0000
Offset 0x014
Type RW, reset 0x0008.0000
16171819202122232425262728293031
reservedALEHIGHRDHIGHWRHIGHreservedCSCFGCSBAUD
CSCFGEXT
reserved
RORORORWRWRWRORORWRWRWRWROROROROType
0001000000000000Reset
0123456789101112131415
MODEreservedRDWSWRWSreserved
RWRWRORORWRWRWRWROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved31:28
879June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller
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