Texas Instruments TM4C1294NCPDT - Figure 18-11. Master RECEIVE of Multiple Data Bytes

Figure 18-11. Master RECEIVE of Multiple Data Bytes
Idle
Write Slave
Address to
I2CMSA
Read I2CMCS
BUSBSY bit=0?
NO
Write ---01011
to I2CMCS
YES
Read I2CMCS
BUSY bit=0?
NO
ERROR bit=0?
YES
ARBLST bit=1?
Write ---0-100
to I2CMCS
NO
Error Service
YES
Idle
Read data from
I2CMDR
Index=m-1?
Write ---00101
to I2CMCS
YES
Idle
Read data from
I2CMDR
Error Service
ERROR bit=0?
YES
Write ---01001
to I2CMCS
Read I2CMCS
BUSY bit=0?
NO
YES
Sequence
may be
omitted in a
Single Master
system
NO
NO
NO
1293June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller