Texas Instruments TM4C1294NCPDT - Register 5: DMA Configuration (DMACFG), Offset 0 X004

Register 5: DMA Configuration (DMACFG), offset 0x004
The DMACFG register controls the configuration of the μDMA controller.
DMA Configuration (DMACFG)
Base 0x400F.F000
Offset 0x004
Type WO, reset -
16171819202122232425262728293031
reserved
WOWOWOWOWOWOWOWOWOWOWOWOWOWOWOWOType
----------------Reset
0123456789101112131415
MASTENreserved
WOWOWOWOWOWOWOWOWOWOWOWOWOWOWOWOType
----------------Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
-WOreserved31:1
Controller Master Enable
DescriptionValue
Disables the μDMA controller.0
Enables μDMA controller.1
-WOMASTEN0
June 18, 2014712
Texas Instruments-Production Data
Micro Direct Memory Access (μDMA)