Texas Instruments TM4C1294NCPDT - Register 31: DMA Primecell Identification 0 (Dmapcellid0), Offset 0 Xff0

Register 31: DMA PrimeCell Identification 0 (DMAPCellID0), offset 0xFF0
The DMAPCellIDn registers are hard-coded, and the fields within the registers determine the reset
values.
DMA PrimeCell Identification 0 (DMAPCellID0)
Base 0x400F.F000
Offset 0xFF0
Type RO, reset 0x0000.000D
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
CID0reserved
ROROROROROROROROROROROROROROROROType
1011000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0000.00ROreserved31:8
μDMA PrimeCell ID Register [7:0]
Provides software a standard cross-peripheral identification system.
0x0DROCID07:0
June 18, 2014738
Texas Instruments-Production Data
Micro Direct Memory Access (μDMA)