Texas Instruments TM4C1294NCPDT User Manual

Register 118: Analog-to-Digital Converter Sleep Mode Clock Gating Control
(SCGCADC), offset 0x738
The SCGCADC register provides software the capability to enable and disable the ADC modules
in sleep mode. When enabled, a module is provided a clock. When disabled, the clock is disabled
to save power.
Important: This register should be used to control the clocking for the ADC modules.
Analog-to-Digital Converter Sleep Mode Clock Gating Control (SCGCADC)
Base 0x400F.E000
Offset 0x738
Type RW, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
S0S1reserved
RWRWROROROROROROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved31:2
ADC Module 1 Sleep Mode Clock Gating Control
DescriptionValue
ADC module 1 is disabled in sleep mode.0
Enable and provide a clock to ADC module 1 in sleep mode.1
0RWS11
ADC Module 0 Sleep Mode Clock Gating Control
DescriptionValue
ADC module 0 is disabled in sleep mode.0
Enable and provide a clock to ADC module 0 in sleep mode.1
0RWS00
June 18, 2014420
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Texas Instruments TM4C1294NCPDT Specifications

General

Brand	Texas Instruments
Model	TM4C1294NCPDT
Category	Microcontrollers
Language	English