DescriptionResetTypeNameBit/Field
Unstack Access Violation
DescriptionValue
No memory management fault has occurred on unstacking for
a return from exception.
0
Unstacking for a return from exception has caused one or more
access violations.
1
This fault is chained to the handler. Thus, when this bit is set, the original
return stack is still present. The SP is not adjusted from the failing return,
a new save is not performed, and a fault address is not written to the
MMADDR register.
This bit is cleared by writing a 1 to it.
0RW1CMUSTKE3
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved2
Data Access Violation
DescriptionValue
A data access violation has not occurred.0
The processor attempted a load or store at a location that does
not permit the operation.
1
When this bit is set, the PC value stacked for the exception return points
to the faulting instruction and the address of the attempted access is
written to the MMADDR register.
This bit is cleared by writing a 1 to it.
0RW1CDERR1
Instruction Access Violation
DescriptionValue
An instruction access violation has not occurred.0
The processor attempted an instruction fetch from a location
that does not permit execution.
1
This fault occurs on any access to an XN region, even when the MPU
is disabled or not present.
When this bit is set, the PC value stacked for the exception return points
to the faulting instruction and the address of the attempted access is
not written to the MMADDR register.
This bit is cleared by writing a 1 to it.
0RW1CIERR0
189June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller
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