Texas Instruments TM4C1294NCPDT User Manual

Register 11: PWM Enable Update (PWMENUPD), offset 0x028
This register specifies when updates to the PWMnEN bit in the PWMENABLE register are performed.
The PWMnEN bit enables the pwmA' or pwmB' output to be passed to the microcontroller's pin.
Updates can be immediate or locally or globally synchronized to the next synchronous update.
PWM Enable Update (PWMENUPD)
PWM0 base: 0x4002.8000
Offset 0x028
Type RW, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
ENUPD0ENUPD1ENUPD2ENUPD3ENUPD4ENUPD5ENUPD6ENUPD7
RWRWRWRWRWRWRWRWRWRWRWRWRWRWRWRWType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x00ROreserved31:16
MnPWM7 Enable Update Mode
DescriptionValue
Immediate
Writes to the PWM7EN bit in the PWMENABLE register are used
by the PWM generator immediately.
0x0
Reserved0x1
Locally Synchronized
Writes to the PWM7EN bit in the PWMENABLE register are used
by the PWM generator the next time the counter is 0.
0x2
Globally Synchronized
Writes to the PWM7EN bit in the PWMENABLE register are used
by the PWM generator the next time the counter is 0 after a
synchronous update has been requested through the PWM
Master Control (PWMCTL) register.
0x3
0RWENUPD715:14
June 18, 20141704
Texas Instruments-Production Data
Pulse Width Modulator (PWM)

Texas Instruments TM4C1294NCPDT Specifications

General

Brand	Texas Instruments
Model	TM4C1294NCPDT
Category	Microcontrollers
Language	English