Register 18: Ethernet MAC Address 2 High (EMACADDR2H), offset 0x050
The MAC Address 2 High (EMACADDR2H) register holds the upper 16 bits of the third 6-byte
MAC address of the station.
Ethernet MAC Address 2 High (EMACADDR2H)
Base 0x400E.C000
Offset 0x050
Type RW, reset 0x0000.FFFF
16171819202122232425262728293031
reservedMBCSAAE
RORORORORORORORORWRWRWRWRWRWRWRWType
0000000000000000Reset
0123456789101112131415
ADDRHI
RWRWRWRWRWRWRWRWRWRWRWRWRWRWRWRWType
1111111111111111Reset
DescriptionResetTypeNameBit/Field
Address Enable
DescriptionValue
The address filter module ignores the third address for filtering.0
The address filter module uses the third address for perfect
filtering.
1
0x0RWAE31
Source Address
DescriptionValue
When this bit is reset, the MAC Address2[47:0] is used to
compare with the DA fields of the received frame.
0
When this bit is set, the MAC Address2[47:0] is used to compare
with the SA fields of the received frame.
1
0x0RWSA30
Mask Byte Control
Mask control bits are provided for comparison of each of the MAC
Address bytes. When set high, the MAC does not compare the
corresponding byte of received DA or SA with the contents of MAC
Address1 registers. Each bit controls the masking of the bytes as follows:
■ Bit 29: ADDRHI [15:8] of EMACADDR2H register
■ Bit 28: ADDRHI [7:0] of EMACADDR2H register
■ Bit 27: ADDRLO [31:24] of EMACADDR2L register
■ Bit 26: ADDRLO [23:16] of EMACADDR2L register
■ Bit 25: ADDRLO [15:8] of EMACADDR2L register
■ Bit 24: ADDRLO [7:0] of EMACADDR2L register
A group of addresses (known as group address filtering) can be filtered
by masking one or more bytes of the address.
0x0RWMBC29:24
1505June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller
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