Register 25: GPTM DMA Event (GPTMDMAEV), offset 0x06C
This register allows software to enable/disable GPTM DMA trigger events. Setting a bit enables the
corresponding DMA trigger, while clearing a bit disables it.
GPTM DMA Event (GPTMDMAEV)
16/32-bit Timer 0 base: 0x4003.0000
16/32-bit Timer 1 base: 0x4003.1000
16/32-bit Timer 2 base: 0x4003.2000
16/32-bit Timer 3 base: 0x4003.3000
16/32-bit Timer 4 base: 0x4003.4000
16/32-bit Timer 5 base: 0x4003.5000
16/32-bit Timer 6 base: 0x400E.0000
16/32-bit Timer 7 base: 0x400E.1000
Offset 0x06C
Type RW, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
TATODMAEN
CAMDMAENCAEDMAENRTCDMAENTAMDMAEN
reserved
TBTODMAEN
CBMDMAENCBEDMAENTBMDMAEN
reserved
RWRWRWRWRWRORORORWRWRWRWROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved31:12
GPTM B Mode Match Event DMA Trigger Enable
When this bit is enabled, a Timer B dma_req signal is sent to the µDMA
when a mode match has occurred.
DescriptionValue
Timer B Mode Match DMA trigger is disabled.0
Timer B DMA Mode Match trigger is enabled.1
0RWTBMDMAEN11
GPTM B Capture Event DMA Trigger Enable
When this bit is enabled, a Timer B dma_req signal is sent to the µDMA
when a capture event has occurred.
DescriptionValue
Timer B Capture Event DMA trigger is disabled.0
Timer B Capture Event DMA trigger is enabled.1
0RWCBEDMAEN10
GPTM B Capture Match Event DMA Trigger Enable
When this bit is enabled, a Timer B dma_req signal is sent to the µDMA
when a capture match event has occurred.
DescriptionValue
Timer B Capture Match DMA trigger is disabled.0
Timer B Capture Match DMA trigger is enabled.1
0RWCBMDMAEN9
1019June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller
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