Register 90: Ethernet PHY False Carrier Sense Counter - MR20 (EPHYFCSCR),
address 0x014
This counter provides information required to implement the False Carriers attribute within the MAU
managed object class of Clause 30 of the IEEE 802.3u specification.
Ethernet PHY False Carrier Sense Counter - MR20 (EPHYFCSCR)
Base n/a
Address 0x014
Type RO, reset 0x0000
0123456789101112131415
FCSCNTreserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0ROreserved15:8
False Carrier Event Counter
This 8-bit counter increments on every false carrier event. This counter
stops when it reaches its maximum count (0xFF). When the counter
exceeds half full (0x7F), an interrupt event is generated. This register
is cleared on read.
0x00ROFCSCNT7:0
June 18, 20141628
Texas Instruments-Production Data
Ethernet Controller
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