Register 83: Ethernet PHY Configuration 3 - MR11 (EPHYCFG3), address
0x00B
Fields in this register are used to configure the Ethernet PHY. These configuration values are
programmed by the system processor after a POR. The DONE bit in the EPHYCFG1 register is set
when configuration is complete. This register is used when the user requires a configuration different
from what is provided in the EMACPC register.
Ethernet PHY Configuration 3 - MR11 (EPHYCFG3)
Base n/a
Address 0x00B
Type RW, reset 0x0000
0123456789101112131415
FLDWNMreserved
MDIMDIXS
POLSWAPreserved
RWRWRWRWRWRORWRWROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0ROreserved15:8
Polarity Swap
DescriptionValue
MDI pairs normal (Receive on EN0RXIN/EN0RXIP pair,
Transmit on EN0TXON/EN0TXOP pair)
0
Inverted polarity on both pairs.1
To enable the port mirror function, set this bit and bit 6 (MDIMDIXS) to
1.
0RWPOLSWAP7
MDI/MDIX Swap
DescriptionValue
MDI pairs normal (Receive on EN0RXIN/EN0RXIP pair,
Transmit on EN0TXON/EN0TXOP pair)
0
Swap MDI pairs (Receive on EN0TXON/EN0TXOP pair, Transmit
on EN0RXIN/EN0RXIP pair)
1
To enable the port mirroring function, set bit 7 and this bit to 1.
0RWMDIMDIXS6
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved5
1611June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller
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