Register 62: System Handler Priority 2 (SYSPRI2), offset 0xD1C
Note: This register can only be accessed from privileged mode.
The SYSPRI2 register configures the priority level, 0 to 7 of the SVCall handler. This register is
byte-accessible.
System Handler Priority 2 (SYSPRI2)
Base 0xE000.E000
Offset 0xD1C
Type RW, reset 0x0000.0000
16171819202122232425262728293031
reservedSVC
RORORORORORORORORORORORORORWRWRWType
0000000000000000Reset
0123456789101112131415
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
SVCall Priority
This field configures the priority level of SVCall. Configurable priority
values are in the range 0-7, with lower values having higher priority.
0x0RWSVC31:29
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x000.0000ROreserved28:0
June 18, 2014178
Texas Instruments-Production Data
Cortex-M4 Peripherals
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