Texas Instruments TM4C1294NCPDT User Manual

Register 15: I
2
C Slave Control/Status (I2CSCSR), offset 0x804
This register functions as a control register when written, and a status register when read.
Read-Only Status Register
I2C Slave Control/Status (I2CSCSR)
I2C 0 base: 0x4002.0000
I2C 1 base: 0x4002.1000
I2C 2 base: 0x4002.2000
I2C 3 base: 0x4002.3000
I2C 4 base: 0x400C.0000
I2C 5 base: 0x400C.1000
I2C 6 base: 0x400C.2000
I2C 7 base: 0x400C.3000
I2C 8 base: 0x400B.8000
I2C 9 base: 0x400B.9000
Offset 0x804
Type RO, reset 0x0000.0000
16171819202122232425262728293031
reserved
ACTDMATXACTDMARX
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
RREQTREQFBROAR2SELQCMDSTQCMDRWreserved
RORORORORCRCROROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
DMA RX Active Status
DescriptionValue
DMA RX is not active0
DMA RX is active.1
0ROACTDMARX31
DMA TX Active Status
DescriptionValue
DMA TX is not active0
DMA TX is active.1
0ROACTDMATX30
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0000.000ROreserved29:6
Quick Command Read / Write
DescriptionValue
Quick command was a write0
Quick command was a read1
This bit only has meaning when the QCMDST bit is set.
0RCQCMDRW5
June 18, 20141332
Texas Instruments-Production Data
Inter-Integrated Circuit (I
2
C) Interface

Texas Instruments TM4C1294NCPDT Specifications

General

Brand	Texas Instruments
Model	TM4C1294NCPDT
Category	Microcontrollers
Language	English