DescriptionResetTypeNameBit/Field
Quick Command Status
DescriptionValue
The last transaction was a normal transaction or a transaction
has not occurred.
0
The last transaction was a Quick Command transaction.1
0RCQCMDST4
OAR2 Address Matched
DescriptionValue
Either the address is not matched or the match is in legacy
mode.
0
OAR2 address matched and ACKed by the slave.1
This bit gets reevaluated after every address comparison.
0ROOAR2SEL3
First Byte Received
DescriptionValue
The first byte has not been received.0
The first byte following the slave's own address has been
received.
1
This bit is only valid when the RREQ bit is set and is automatically cleared
when data has been read from the I2CSDR register.
Note: This bit is not used for slave transmit operations.
0ROFBR2
Transmit Request
DescriptionValue
No outstanding transmit request.0
The I
2
C controller has been addressed as a slave transmitter
and is using clock stretching to delay the master until data has
been written to the I2CSDR register.
1
0ROTREQ1
Receive Request
DescriptionValue
No outstanding receive data.0
The I
2
C controller has outstanding receive data from the I
2
C
master and is using clock stretching to delay the master until
the data has been read from the I2CSDR register.
1
0RORREQ0
1333June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller
To Next Page
Loading...
Need help?
General
