DescriptionResetTypeNameBit/Field
Low Battery Voltage Interrupt Clear
Writing a 1 to this bit clears the LOWBAT bit in the HIBRIS and HIBMIS
registers.
Reads return the raw interrupt status.
0RW1CLOWBAT2
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved1
RTC Alert0 Masked Interrupt Clear
Writing a 1 to this bit clears the RTCALT0 bit in the HIBRIS and HIBMIS
registers.
Reads return the raw interrupt status.
Note: The timer interrupt source cannot be cleared if the RTC value
and the HIBRTCM0 register / RTCMSS field values are equal.
The match interrupt takes priority over the interrupt clear.
0RW1CRTCALT00
569June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller
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