Texas Instruments TM4C1294NCPDT User Manual

Register 80: PWM0 Fault Status 0 (PWM0FLTSTAT0), offset 0x804
Register 81: PWM1 Fault Status 0 (PWM1FLTSTAT0), offset 0x884
Register 82: PWM2 Fault Status 0 (PWM2FLTSTAT0), offset 0x904
Register 83: PWM3 Fault Status 0 (PWM3FLTSTAT0), offset 0x984
Along with the PWMnFLTSTAT1 register, this register provides status regarding the fault condition
inputs.
If the LATCH bit in the PWMnCTL register is clear, the contents of the PWMnFLTSTAT0 register
are read-only (RO) and provide the current state of the MnFAULTn inputs.
If the LATCH bit in the PWMnCTL register is set, the contents of the PWMnFLTSTAT0 register are
read / write 1 to clear (RW1C) and provide a latched version of the MnFAULTn inputs. In this mode,
the register bits are cleared by writing a 1 to a set bit. The MnFAULTn inputs are recorded after their
sense is adjusted in the generator.
The contents of this register can only be written if the fault source extensions are enabled (the
FLTSRC bit in the PWMnCTL register is set).
Note: The fault status registers, PWMnFLTSTAT0 and PWMnFLTSTAT1, reflect the status of all
fault sources, regardless of what fault sources are enabled for that particular generator.
PWMn Fault Status 0 (PWMnFLTSTAT0)
PWM0 base: 0x4002.8000
Offset 0x804
Type -, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
FAULT0FAULT1FAULT2FAULT3reserved
----ROROROROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved31:4
Fault Input 3
If the PWMnCTL register LATCH bit is clear, this bit is RO and represents
the current state of the MnFAULT3 input signal after the logic sense
adjustment.
If the PWMnCTL register LATCH bit is set, this bit is RW1C and
represents a sticky version of the MnFAULT3 input signal after the logic
sense adjustment.
■ If FAULT3 is set, the input transitioned to the active state previously.
■ If FAULT3 is clear, the input has not transitioned to the active state
since the last time it was cleared.
■ The FAULT3 bit is cleared by writing it with the value 1.
0-FAULT33
June 18, 20141740
Texas Instruments-Production Data
Pulse Width Modulator (PWM)

Texas Instruments TM4C1294NCPDT Specifications

General

Brand	Texas Instruments
Model	TM4C1294NCPDT
Category	Microcontrollers
Language	English