Texas Instruments TM4C1294NCPDT User Manual

DescriptionResetTypeNameBit/Field
Fault Input 2
If the PWMnCTL register LATCH bit is clear, this bit is RO and represents
the current state of the MnFAULT2 input signal after the logic sense
adjustment.
If the PWMnCTL register LATCH bit is set, this bit is RW1C and
represents a sticky version of the MnFAULT2 input signal after the logic
sense adjustment.
■ If FAULT2 is set, the input transitioned to the active state previously.
■ If FAULT2 is clear, the input has not transitioned to the active state
since the last time it was cleared.
■ The FAULT2 bit is cleared by writing it with the value 1.
0-FAULT22
Fault Input 1
If the PWMnCTL register LATCH bit is clear, this bit is RO and represents
the current state of the MnFAULT1 input signal after the logic sense
adjustment.
If the PWMnCTL register LATCH bit is set, this bit is RW1C and
represents a sticky version of the MnFAULT1 input signal after the logic
sense adjustment.
■ If FAULT1 is set, the input transitioned to the active state previously.
■ If FAULT1 is clear, the input has not transitioned to the active state
since the last time it was cleared.
■ The FAULT1 bit is cleared by writing it with the value 1.
0-FAULT11
Fault Input 0
If the PWMnCTL register LATCH bit is clear, this bit is RO and represents
the current state of the input signal after the logic sense adjustment.
If the PWMnCTL register LATCH bit is set, this bit is RW1C and
represents a sticky version of the input signal after the logic sense
adjustment.
■ If FAULT0 is set, the input transitioned to the active state previously.
■ If FAULT0 is clear, the input has not transitioned to the active state
since the last time it was cleared.
■ The FAULT0 bit is cleared by writing it with the value 1.
0-FAULT00
1741June 18, 2014
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TM4C1294NCPDT Microcontroller

Texas Instruments TM4C1294NCPDT Specifications

General

Brand	Texas Instruments
Model	TM4C1294NCPDT
Category	Microcontrollers
Language	English