Texas Instruments TM4C1294NCPDT User Manual

DescriptionResetTypeNameBit/Field
MII Write
DescriptionValue
Read operation is active and read data is placed in the MII Data
register (EMACMIIDATA).
0
PHY is notified that this is a write operation using the MII Data
Register (EMACMIIDATA).
1
0x0RWMIIW1
MII Busy
Indicates whether the MII is busy with a read or write access.
This bit should read logic 0 before writing to the EMACMIIADDR register
or the EMACMIIDATA register. During a PHY register access, the
software sets this bit to indicate that a read or write access is in progress.
The EMACMIIDATA register is invalid until this bit is cleared by the
MAC. Therefore, EMACMIIDATA should be kept valid until the MAC
clears this bit during a PHY Write operation. Similarly for a read
operation, the contents of EMACMIIDATA are not valid until this bit is
cleared.
DescriptionValue
EMACMIIADDR and EMACMIIDATA are available for reads
and writes.
0
Read or write access is in progress.1
The subsequent read or write operations should happen only after the
previous operation is complete.
0x0RWMIIB0
1485June 18, 2014
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TM4C1294NCPDT Microcontroller

Texas Instruments TM4C1294NCPDT Specifications

General

Brand	Texas Instruments
Model	TM4C1294NCPDT
Category	Microcontrollers
Language	English