DescriptionResetTypeNameBit/Field
Comparison Trigger Condition
This field specifies the operational region in which a trigger is generated
when the ADC conversion data is compared against the values of COMP0
and COMP1. The COMP0 and COMP1 fields are defined in the
ADCDCCMPx registers.
DescriptionValue
Low Band
ADC Data < COMP0 ≤ COMP1
0x0
Mid Band
COMP0 < ADC Data ≤ COMP1
0x1
reserved0x2
High Band
COMP0 ≤ COMP1 ≤ ADC Data
0x3
0x0RWCTC11:10
Comparison Trigger Mode
This field specifies the mode by which the trigger comparison is made.
DescriptionValue
Always
This mode generates a trigger every time the ADC conversion
data falls within the selected operational region.
0x0
Once
This mode generates a trigger the first time that the ADC
conversion data enters the selected operational region.
0x1
Hysteresis Always
This mode generates a trigger when the ADC conversion data
falls within the selected operational region and continues to
generate the trigger until the hysteresis condition is cleared by
entering the opposite operational region.
Note that the hysteresis modes are only defined for CTC
encodings of 0x0 and 0x3.
0x2
Hysteresis Once
This mode generates a trigger the first time that the ADC
conversion data falls within the selected operational region. No
additional triggers are generated until the hysteresis condition
is cleared by entering the opposite operational region.
Note that the hysteresis modes are only defined for CTC
encodings of 0x0 and 0x3.
0x3
0x0RWCTM9:8
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0ROreserved7:5
June 18, 20141154
Texas Instruments-Production Data
Analog-to-Digital Converter (ADC)
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