4. Enable the I2CSDA pin for open-drain operation. See page 775.
5. Configure the PMCn fields in the GPIOPCTL register to assign the I
2
C signals to the appropriate
pins. See page 787 and Table 26-5 on page 1808.
6. Initialize the I
2
C Master by writing the I2CMCR register with a value of 0x0000.0010.
7. Set the desired SCL clock speed of 100 Kbps by writing the I2CMTPR register with the correct
value. The value written to the I2CMTPR register represents the number of system clock periods
in one SCL clock period. The TPR value is determined by the following equation:
TPR = (System Clock/(2*(SCL_LP + SCL_HP)*SCL_CLK))-1;
TPR = (20MHz/(2*(6+4)*100000))-1;
TPR = 9
Write the I2CMTPR register with the value of 0x0000.0009.
8. Specify the slave address of the master and that the next operation is a Transmit by writing the
I2CMSA register with a value of 0x0000.0076. This sets the slave address to 0x3B.
9. Place data (byte) to be transmitted in the data register by writing the I2CMDR register with the
desired data.
10. Initiate a single byte transmit of the data from Master to Slave by writing the I2CMCS register
with a value of 0x0000.0007 (STOP, START, RUN).
11. Wait until the transmission completes by polling the I2CMCS register's BUSBSY bit until it has
been cleared.
12. Check the ERROR bit in the I2CMCS register to confirm the transmit was acknowledged.
18.4.2 Configure the I
2
C Master to High Speed Mode
To configure the I
2
C master to High Speed mode:
1. Enable the I
2
C clock using the RCGCI2C register in the System Control module (see page 391).
2. Enable the clock to the appropriate GPIO module via the RCGCGPIO register in the System
Control module (see page 382). To find out which GPIO port to enable, refer to Table
26-5 on page 1808.
3. In the GPIO module, enable the appropriate pins for their alternate function using the
GPIOAFSEL register (see page 770). To determine which GPIOs to configure, see Table
26-4 on page 1797.
4. Enable the I2CSDA pin for open-drain operation. See page 775.
5. Configure the PMCn fields in the GPIOPCTL register to assign the I
2
C signals to the appropriate
pins. See page 787 and Table 26-5 on page 1808.
6. Initialize the I
2
C Master by writing the I2CMCR register with a value of 0x0000.0010.
7. Set the desired SCL clock speed of 3.33 Mbps by writing the I2CMTPR register with the correct
value. The value written to the I2CMTPR register represents the number of system clock periods
in one SCL clock period. The TPR value is determined by the following equation:
June 18, 20141298
Texas Instruments-Production Data
Inter-Integrated Circuit (I
2
C) Interface
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