Texas Instruments TM4C1294NCPDT - Page 1314

DescriptionResetTypeNameBit/Field
High-Speed Enable
DescriptionValue
The SCL Clock Period set by TPR applies to Standard mode
(100 Kbps), Fast-mode (400 Kbps), or Fast-mode plus (1 Mbps).
0
The SCL Clock Period set by TPR applies to High-speed mode
(3.33 Mbps).
1
0x0WOHS7
Timer Period
This field is used in the equation to configure SCL_PERIOD:
SCL_PERIOD = 2×(1 + TPR)×(SCL_LP + SCL_HP)×CLK_PRD
where:
SCL_PRD is the SCL line period (I
2
C clock).
TPR is the Timer Period register value (range of 1 to 127).
SCL_LP is the SCL Low period (fixed at 6).
SCL_HP is the SCL High period (fixed at 4).
CLK_PRD is the system clock period in ns.
0x1RWTPR6:0
June 18, 20141314
Texas Instruments-Production Data
Inter-Integrated Circuit (I
2
C) Interface