Texas Instruments TM4C1294NCPDT - Page 1323

DescriptionResetTypeNameBit/Field
Address/Data NACK Interrupt Mask
DescriptionValue
No interrupt.0
An unmasked Address/Data NACK interrupt was signaled and
is pending.
1
This bit is cleared by writing a 1 to the NACKIC bit in the I2CMICR
register.
0RONACKMIS4
Transmit DMA Interrupt Status
DescriptionValue
No interrupt.0
An unmasked transmit DMA complete interrupt was signaled
and is pending.
1
This bit is cleared by writing a 1 to the DMATXIC bit in the I2CMICR
register.
0RODMATXMIS3
Receive DMA Interrupt Status
DescriptionValue
No interrupt.0
An unmasked receive DMA complete interrupt was signaled
and is pending.
1
This bit is cleared by writing a 1 to the DMARXIC bit in the I2CMICR
register.
0RODMARXMIS2
Clock Timeout Masked Interrupt Status
DescriptionValue
No interrupt.0
An unmasked clock timeout interrupt was signaled and is
pending.
1
This bit is cleared by writing a 1 to the CLKIC bit in the I2CMICR register.
0ROCLKMIS1
Masked Interrupt Status
DescriptionValue
An interrupt has not occurred or is masked.0
An unmasked master interrupt was signaled and is pending.1
This bit is cleared by writing a 1 to the IC bit in the I2CMICR register.
0ROMIS0
1323June 18, 2014
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TM4C1294NCPDT Microcontroller