Texas Instruments TM4C1294NCPDT User Manual

DescriptionResetTypeNameBit/Field
RX FIFO Trigger
Indicates at what fill level the RX FIFO will generate a trigger.
Note: Programming RXTRIG to 0x0 has no effect since no data is
present to transfer out of RX FIFO.
DescriptionValue
Trigger when RX FIFO contains no bytes0x0
Trigger when Rx FIFO contains 1 or more bytes0x1
Trigger when Rx FIFO contains 2 or more bytes0x2
Trigger when Rx FIFO contains 3 or more bytes0x3
Trigger when Rx FIFO contains 4 or more bytes0x4
Trigger when Rx FIFO contains 5 or more bytes0x5
Trigger when Rx FIFO contains 6 or more bytes0x6
Trigger when Rx FIFO contains 7 or more bytes.0x7
0x4RWRXTRIG18:16
TX Control Assignment
DescriptionValue
TX FIFO is assigned to Master0
TX FIFO is assigned to Slave1
0RWTXASGNMT15
TX FIFO Flush
Setting this bit will Flush the TX FIFO. This bit will self-clear when the
flush has completed.
0RWTXFLUSH14
DMA TX Channel Enable
DescriptionValue
DMA TX channel disabled0
DMA TX channel enabled1
0RWDMATXENA13
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x000ROreserved12:3
TX FIFO Trigger
Indicates at what fill level in the TX FIFO a trigger will be generated.
DescriptionValue
Trigger when the TX FIFO is empty.0x0
Trigger when TX FIFO contains ≤ 1 byte0x1
Trigger when TX FIFO contains ≤ 2 bytes0x2
Trigger when TX FIFO ≤ 3 bytes0x3
Trigger when FIFO ≤ 4 bytes0x4
Trigger when FIFO ≤ 5 bytes0x5
Trigger when FIFO ≤ 6 bytes0x6
Trigger when FIFO ≤ 7 bytes0x7
0x4RWTXTRIG2:0
1351June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller

Texas Instruments TM4C1294NCPDT Specifications

General

Brand	Texas Instruments
Model	TM4C1294NCPDT
Category	Microcontrollers
Language	English