DescriptionResetTypeNameBit/Field
Trigger Sense
The TSEN field specifies the sense of the comparator output that
generates an ADC event. The sense conditioning is as follows:
DescriptionValue
Level sense, see TSLVAL0x0
Falling edge0x1
Rising edge0x2
Either edge0x3
0x0RWTSEN6:5
Interrupt Sense Level Value
DescriptionValue
An interrupt is generated if the comparator output is Low.0
An interrupt is generated if the comparator output is High.1
0RWISLVAL4
Interrupt Sense
The ISEN field specifies the sense of the comparator output that
generates an interrupt. The sense conditioning is as follows:
DescriptionValue
Level sense, see ISLVAL0x0
Falling edge0x1
Rising edge0x2
Either edge0x3
0x0RWISEN3:2
Comparator Output Invert
DescriptionValue
The output of the comparator is unchanged.0
The output of the comparator is inverted prior to being processed
by hardware.
1
0RWCINV1
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved0
June 18, 20141666
Texas Instruments-Production Data
Analog Comparators