Texas Instruments TM4C1294NCPDT - Page 1719

DescriptionResetTypeNameBit/Field
Comparator A Down Interrupt
DescriptionValue
No interrupt has occurred or the interrupt is masked.0
The INTCMPAD bits in the PWMnRIS and PWMnINTEN registers
are set, providing an interrupt to the interrupt controller.
1
This bit is cleared by writing a 1. Clearing this bit also clears the
INTCMPAD bit in the PWMnRIS register.
0RW1CINTCMPAD3
Comparator A Up Interrupt
DescriptionValue
No interrupt has occurred or the interrupt is masked.0
The INTCMPAU bits in the PWMnRIS and PWMnINTEN registers
are set, providing an interrupt to the interrupt controller.
1
This bit is cleared by writing a 1. Clearing this bit also clears the
INTCMPAU bit in the PWMnRIS register.
0RW1CINTCMPAU2
Counter=Load Interrupt
DescriptionValue
No interrupt has occurred or the interrupt is masked.0
The INTCNTLOAD bits in the PWMnRIS and PWMnINTEN
registers are set, providing an interrupt to the interrupt controller.
1
This bit is cleared by writing a 1. Clearing this bit also clears the
INTCNTLOAD bit in the PWMnRIS register.
0RW1CINTCNTLOAD1
Counter=0 Interrupt
DescriptionValue
No interrupt has occurred or the interrupt is masked.0
The INTCNTZERO bits in the PWMnRIS and PWMnINTEN
registers are set, providing an interrupt to the interrupt controller.
1
This bit is cleared by writing a 1. Clearing this bit also clears the
INTCNTZERO bit in the PWMnRIS register.
0RW1CINTCNTZERO0
1719June 18, 2014
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TM4C1294NCPDT Microcontroller