Table 26-7. Connections for Unused Signals (128-Pin TQFP) (continued)
Preferred PracticeAcceptable PracticePin NumberSignal NameFunction
NCNC65HIB
Hibernate
VDDNC68VBAT
GNDNC64WAKE
GNDNC66XOSC0
NCNC67XOSC1
NCNCSee NC pin numbers
in Table
26-3 on page 1785
NCNo Connects
GNDNC88OSC0
System
Control
NCNC89OSC1
Pull up as shown in Figure
5-1 on page 224
VDD70RST
Pull-down to GND with 1K
resistor
d
NC93USB0DM / PL7
USB
Pull-down to GND with 1K
resistor
d
NC94USB0DP / PL6
a. The internal Ethernet PHY should not be enabled when RBIAS is not connected. The ROM boot loader will enable the
internal Ethernet Phy if no code is present in the flash and a 24-25Mhz crystal is attached to the OSC0/1 pins.
b. PA1 (UART0TX) may be enabled as an output by the ROM boot loader if no code is present in the flash and PA0 (UART0RX)
receives a valid boot signature. Ensure that this condition will not occur if PA1 is to be connected directly to GND.
c. PA4 (SSI0XDAT0) may be enabled as an output by the ROM boot loader if no code is present in the flash and the SSI0x
(PA2, PA3, PA5) receives a valid boot signature. Ensure that this condition will not occur if PA4 is to be connected
directly to GND.
d. The ROM boot loader may configure these pins as USB pins if no code is present in the flash therefore they should not
be directly connected to ground.
1817June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller
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