DescriptionResetTypeNameBit/Field
Boot GPIO Enable
Clearing this bit enables the use of a GPIO pin to enable the ROM Boot
Loader at reset. When this bit is set, the contents of address
0x0000.0004 are checked to see if the Flash memory has been
programmed. If the contents are not 0xFFFF.FFFF, the core executes
out of Flash memory. If the Flash has not been programmed, the core
executes out of ROM.
1ROEN8
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x7ROreserved7:5
KEY Select
This bit chooses between using the value 0xA442 or the PEKEY value
in the FLPEKEY register as the WRKEY value in the FMC/FMC2 register.
DescriptionValue
The PEKEY value in the FLPEKEY register is committed by user
and used as the WRKEY in the FMC/FMC2 register. Writes to
FMC/FMC2 register with a 0xA442 key are ignored.
0
0xA442 is used as key1
1ROKEY4
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x3ROreserved3:2
Debug Control 1
The DBG1 bit must be 1 and DBG0 must be 0 for debug to be available.
1RODBG11
Debug Control 0
The DBG1 bit must be 1 and DBG0 must be 0 for debug to be available.
0RODBG00
June 18, 2014676
Texas Instruments-Production Data
Internal Memory
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