11.6 Register Descriptions .................................................................................................. 856
12 Cyclical Redundancy Check (CRC) .................................................................... 946
12.1 Functional Description ................................................................................................. 946
12.1.1 CRC Support .............................................................................................................. 946
12.2 Initialization and Configuration ..................................................................................... 948
12.2.1 CRC Initialization and Configuration ............................................................................. 948
12.3 Register Map .............................................................................................................. 949
12.4 CRC Module Register Descriptions .............................................................................. 949
13 General-Purpose Timers ...................................................................................... 955
13.1 Block Diagram ............................................................................................................ 956
13.2 Signal Description ....................................................................................................... 957
13.3 Functional Description ................................................................................................. 958
13.3.1 GPTM Reset Conditions .............................................................................................. 959
13.3.2 Timer Clock Source ..................................................................................................... 959
13.3.3 Timer Modes ............................................................................................................... 959
13.3.4 Wait-for-Trigger Mode .................................................................................................. 968
13.3.5 Synchronizing GP Timer Blocks ................................................................................... 969
13.3.6 DMA Operation ........................................................................................................... 970
13.3.7 ADC Operation ............................................................................................................ 970
13.3.8 Accessing Concatenated 16/32-Bit GPTM Register Values ............................................ 970
13.4 Initialization and Configuration ..................................................................................... 971
13.4.1 One-Shot/Periodic Timer Mode .................................................................................... 971
13.4.2 Real-Time Clock (RTC) Mode ...................................................................................... 972
13.4.3 Input Edge-Count Mode ............................................................................................... 972
13.4.4 Input Edge Time Mode ................................................................................................. 973
13.4.5 PWM Mode ................................................................................................................. 973
13.5 Register Map .............................................................................................................. 974
13.6 Register Descriptions .................................................................................................. 975
14 Watchdog Timers ............................................................................................... 1028
14.1 Block Diagram ........................................................................................................... 1029
14.2 Functional Description ............................................................................................... 1029
14.2.1 Register Access Timing ............................................................................................. 1030
14.3 Initialization and Configuration .................................................................................... 1030
14.4 Register Map ............................................................................................................ 1030
14.5 Register Descriptions ................................................................................................. 1031
15 Analog-to-Digital Converter (ADC) ................................................................... 1053
15.1 Block Diagram ........................................................................................................... 1054
15.2 Signal Description ..................................................................................................... 1055
15.3 Functional Description ............................................................................................... 1056
15.3.1 Sample Sequencers .................................................................................................. 1056
15.3.2 Module Control .......................................................................................................... 1057
15.3.3 Hardware Sample Averaging Circuit ........................................................................... 1062
15.3.4 Analog-to-Digital Converter ........................................................................................ 1063
15.3.5 Differential Sampling .................................................................................................. 1065
15.3.6 Internal Temperature Sensor ...................................................................................... 1067
15.3.7 Digital Comparator Unit .............................................................................................. 1068
15.4 Initialization and Configuration .................................................................................... 1072
7June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller
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