DescriptionResetTypeNameBit/Field
GPTM Timer B Event Mode
The TBEVENT values are defined as follows:
DescriptionValue
Positive edge0x0
Negative edge0x1
Reserved0x2
Both edges0x3
Note: If PWM output inversion is enabled, edge detection interrupt
behavior is reversed. Thus, if a positive-edge interrupt trigger
has been set and the PWM inversion generates a postive
edge, no event-trigger interrupt asserts. Instead, the interrupt
is generated on the negative edge of the PWM signal.
0x0RWTBEVENT11:10
GPTM Timer B Stall Enable
The TBSTALL values are defined as follows:
DescriptionValue
Timer B continues counting while the processor is halted by the
debugger.
0
Timer B freezes counting while the processor is halted by the
debugger.
1
If the processor is executing normally, the TBSTALL bit is ignored.
0RWTBSTALL9
GPTM Timer B Enable
The TBEN values are defined as follows:
DescriptionValue
Timer B is disabled.0
Timer B is enabled and begins counting or the capture logic is
enabled based on the GPTMCFG register.
1
0RWTBEN8
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved7
GPTM Timer A PWM Output Level
The TAPWML values are defined as follows:
DescriptionValue
Output is unaffected.0
Output is inverted.1
0RWTAPWML6
987June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller
To Next Page
Loading...
Need help?
General
