DescriptionResetTypeNameBit/Field
SS0 Raw Interrupt Status
DescriptionValue
An interrupt has not occurred.0
A sample has completed conversion and the respective
ADCSSCTL0 IEn bit is set, enabling a raw interrupt.
1
This bit is cleared by writing a 1 to the IN0 bit in the ADCISC register.
0ROINR00
1081June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller
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