DescriptionResetTypeNameBit/Field
SS1 Interrupt Status and Clear
DescriptionValue
No interrupt has occurred or the interrupt is masked.0
Both the INR1 bit in the ADCRIS register and the MASK1 bit in
the ADCIM register are set, providing a level-based interrupt to
the interrupt controller.
1
This bit is cleared by writing a 1. Clearing this bit also clears the INR1
bit in the ADCRIS register.
0RW1CIN11
SS0 Interrupt Status and Clear
DescriptionValue
No interrupt has occurred or the interrupt is masked.0
Both the INR0 bit in the ADCRIS register and the MASK0 bit in
the ADCIM register are set, providing a level-based interrupt to
the interrupt controller.
1
This bit is cleared by writing a 1. Clearing this bit also clears the INR0
bit in the ADCRIS register.
0RW1CIN00
June 18, 20141088
Texas Instruments-Production Data
Analog-to-Digital Converter (ADC)