DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0000ROreserved31:16
Enable Clear To Send
DescriptionValue
CTS hardware flow control is disabled.0
CTS hardware flow control is enabled. Data is only transmitted
when the UnCTS signal is asserted.
1
0RWCTSEN15
Enable Request to Send
DescriptionValue
RTS hardware flow control is disabled.0
RTS hardware flow control is enabled. Data is only requested
(by asserting UnRTS) when the receive FIFO has available
entries.
1
0RWRTSEN14
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved13:12
Request to Send
When RTSEN is clear, the status of this bit is reflected on the U1RTS
signal. If RTSEN is set, this bit is ignored on a write and should be ignored
on read.
0RWRTS11
Data Terminal Ready
This bit sets the state of the UnDTR output.
0RWDTR10
UART Receive Enable
DescriptionValue
The receive section of the UART is disabled.0
The receive section of the UART is enabled.1
If the UART is disabled in the middle of a receive, it completes the current
character before stopping.
Note: To enable reception, the UARTEN bit must also be set.
1RWRXE9
UART Transmit Enable
DescriptionValue
The transmit section of the UART is disabled.0
The transmit section of the UART is enabled.1
If the UART is disabled in the middle of a transmission, it completes the
current character before stopping.
Note: To enable transmission, the UARTEN bit must also be set.
1RWTXE8
1189June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller
To Next Page
Loading...
Need help?
General
